Enhanced device and manufacturing method therefor
US9269800B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 29, 2013 |
| Grant date | Feb 23, 2016 |
| Priority date | — |
| Expiry date | Mar 29, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/8503
Abstract
An enhancement-mode device comprises: a substrate, an epitaxial multilayer structure formed on the substrate, and a gate region formed on the epitaxial multilayer structure, where the epitaxial multilayer structure sequentially comprises from the substrate: a nucleation layer, a buffer layer, a heterojunction structure layer, a second gallium nitride layer, a nitride transition layer and a dielectric layer, where the heterojunction structure layer comprises a gallium nitride channel layer and a barrier layer which has a sandwich structure, and a middle layer of the sandwich structure is a first gallium nitride layer; and the gate region comprises a gate metal layer and a p-type nitride layer located under the gate metal layer, wherein the p-type nitride layer is embedded into the epitaxial multilayer structure, a bottom of the p-type nitride layer is in contact with the first gallium nitride layer of the sandwich structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.