Method and apparatus for multiple-bit DRAM error recovery
US9274888B2 · kind B2 · utility
1Cited by
1References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 15, 2013 |
| Grant date | Mar 1, 2016 |
| Priority date | — |
| Expiry date | Nov 15, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/765
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system for replacing a page stored in system memory when reading the page incurs a multiple-bit error. Upon reading a page in system memory for which a multiple-bit error is detected, backup data in flash memory is loaded into a redundant page in the system memory, and a re-mapper is configured so that future accesses to the page are redirected to the redundant page.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.