DAC architecture for LCD source driver
US9275598B2 · kind B2 · utility
3Cited by
8References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 20, 2010 |
| Grant date | Mar 1, 2016 |
| Priority date | — |
| Expiry date | Oct 23, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/806
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A two-stage digital-to-analog converter for outputting an analog voltage in response to a M-bit digital input code includes a two-bit serial charge redistribution digital-to-analog converter having a high reference voltage input node for receiving a high reference voltage and a low reference voltage input node for receiving a low reference voltage, and a voltage selector. The voltage selector sets the high reference voltage and low reference voltage to selected levels depending on at least a portion of the M-bit digital input code.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.