Nanowire and planar transistors co-integrated on utbox SOI substrate

US9276073B2 · kind B2 · utility

Assignees

• COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES · FR
• STMicroelectronics (Crolles 2) SAS · FR

Inventors

• Sylvain Barraud · Grenoble, FR
• Yves Morand · Grenoble, FR

Key dates

• Filing date: May 1, 2014
• Grant date: Mar 1, 2016
• Expiry date: Jun 10, 2034

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y02P70/50

Abstract

Fabrication of a microelectronic device on a semiconductor on insulator type substrate, the device being provided with a transistor of a given type, the channel structure of which is formed from semiconducting bar(s), a dielectric area different from the insulating layer of the substrate being provided to replace the insulating layer, facing the transistor channel structure, specifically for this given type of transistor.