Three-dimensional semiconductor devices
US9281019B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 18, 2013 |
| Grant date | Mar 8, 2016 |
| Priority date | — |
| Expiry date | Jan 25, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/884
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A three-dimensional semiconductor device includes bit lines provided on a substrate, a gate structure provided between the substrate and the bit lines, a common source line provided between the gate structure and the bit lines, and channel pipes connecting the bit lines to the common source line. Each of the channel pipes may include a pair of vertical portions extending through the gate structure and a horizontal portion connecting the vertical portions. The pair of vertical portions are provided under a pair of the bit lines arranged adjacent to each other, respectively.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.