Wafer handling systems and methods
US9281222B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 10, 2014 |
| Grant date | Mar 8, 2016 |
| Priority date | — |
| Expiry date | Jun 24, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/67742
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A wafer handling system may include upper and lower linked robot arms that may move a wafer along a nonlinear trajectory between chambers of a semiconductor processing system. These features may result in a smaller footprint in which the semiconductor processing system may operate, smaller transfer chambers, smaller openings in process chambers, and smaller slit valves, while maintaining high wafer throughput. In some embodiments, simultaneous fast wafer swaps between two separate chambers, such as load locks and ALD (atomic layer deposition) carousels, may be provided. Methods of wafer handling are also provided, as are other aspects.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.