Resistive random-access memory (RRAM) with multi-layer device structure

US9281475B2 · kind B2 · utility

Assignee

• TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD. · TW

Inventors

• Ting-Chang Chang · Hsinchu, TW
• Kuan-Chang Chang
• Tsung-Ming Tsai
• Chih-Hung Pan · Taichung, TW
• Ying-Lang Wang · Zhuolan Township, TW
• Kei-Wei Chen · Tainan, TW
• Shih-Chieh Chang · Taipei, TW
• Te-Ming Kung · Hsinchu, TW

Key dates

• Filing date: May 28, 2014
• Grant date: Mar 8, 2016
• Expiry date: May 28, 2034

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10N70/24

Abstract

A resistive memory cell is disclosed. The resistive memory cell comprises a pair of electrodes and a multi-layer resistance-switching network disposed between the pair of electrodes. The multi-layer resistance-switching network comprises a pair of carbon doping layers and a group-IV element doping layer disposed between the pair of carbon doping layers. Each carbon doping layer comprises silicon oxide doped with carbon. The group-IV doping layer comprises silicon oxide doped with a group-IV element. A method of fabricating a resistive memory cell is also disclosed. The method comprises forming a first carbon doping layer on a first electrode using sputtering, forming a group-IV element doping layer on the first carbon doping layer using sputtering, forming a second carbon doping layer on the group-IV element doping layer using sputtering, and forming a second electrode on the second carbon doping layer using sputtering.