System and method for phase change memory with erase flag cells
US9286160B2 · kind B2 · utility
4Cited by
14References
34Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 7, 2014 |
| Grant date | Mar 15, 2016 |
| Priority date | — |
| Expiry date | May 31, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5646
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
According to embodiments, a phase change memory (PCM) array includes a plurality of memory cells grouped into memory blocks. In the PCM array, each memory cell is a PCM cell. The PCM array also includes a plurality of erase flag cells. Each erase flag cell of the plurality of erase flag cells is associated with a memory block and indicates whether the memory block stores valid data or erased data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.