3DIC memory chips including computational logic-in-memory for performing accelerated data processing
US9286216B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 16, 2014 |
| Grant date | Mar 15, 2016 |
| Priority date | — |
| Expiry date | Jul 14, 2034 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
This disclosure relates to a three-dimensional (3D) integrated circuit (3DIC) memory chip including computational logic-in-memory (LiM) for performing accelerated data processing. Related memory systems and methods are also disclosed. In one embodiment, the 3DIC memory chip includes at least one memory layer that provides a primary memory configured to store data. The 3DIC memory chip also includes a computational LiM layer. The computational LiM layer is a type of memory layer having application-specific computational logic integrated into local memory while externally appearing as regular memory. The computational LiM layer and the primary memory are interconnected through through-silica vias (TSVs). In this manner, the computational LiM layer may load data from the primary memory with the 3DIC memory chip without having to access an external bus coupling the 3DIC memory chip to a central processing unit (CPU) or other processors to computationally process the data and generate a computational result.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.