Data processing apparatus and method for transferring workload between source and destination processing circuitry
US9286222B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 30, 2013 |
| Grant date | Mar 15, 2016 |
| Priority date | — |
| Expiry date | Apr 30, 2033 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In response to a transfer stimulus, performance of a processing workload is transferred from a source processing circuitry to a destination processing circuitry, in preparation for the source processing circuitry to be placed in a power saving condition following the transfer. To reduce the number of memory fetches required by the destination processing circuitry following the transfer, a cache of the source processing circuitry is maintained in a powered state for a snooping period. During the snooping period, cache snooping circuitry snoops data values in the source cache and retrieves the snoop data values for the destination processing circuitry.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.