Packaging devices and methods for semiconductor devices
US9287194B2 · kind B2 · utility
16Cited by
11References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Mar 6, 2013 |
| Grant date | Mar 15, 2016 |
| Priority date | — |
| Expiry date | Mar 6, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Packaging devices and methods for semiconductor devices are disclosed. In some embodiments, a packaging device for a semiconductor device includes a packaging substrate including a semiconductor device mounting region. The packaging device includes a stress isolation structure (SIS) disposed on the packaging substrate proximate a portion of a perimeter of the semiconductor device mounting region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.