Semiconductor device
US9287214B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 20, 2014 |
| Grant date | Mar 15, 2016 |
| Priority date | — |
| Expiry date | May 3, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/021
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device and a method of forming the same are disclosed, which forms a low-dielectric-constant oxide film only at a peripheral part of a bit line conductive material, resulting in reduction in parasitic capacitance of the bit line. The semiconductor device includes a bit line formed over a semiconductor substrate, a first spacer formed over sidewalls of the bit line, and a second spacer formed over sidewalls of the first spacer, configured to have a dielectric constant lower than that of the first spacer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.