System and method for data synchronization across digital device interfaces
US9292456B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 16, 2013 |
| Grant date | Mar 22, 2016 |
| Priority date | — |
| Expiry date | Nov 15, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/1673
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system for synchronizing and re-ordering data transmitted between first and second clock domains associated with first and second device interfaces, respectively, includes a splitter, an arbiter, a transaction manager, and a read data buffer. The splitter receives a parent read request from one or more data input ports of the first device interface and splits it into one or more read requests. The arbiter receives the one or more read requests and selects one of the read requests and transmits it to the transaction manager. The transaction manager allocates an entry to the read request and then the read request is transmitted to the read data buffer. Thereafter, the read data buffer transmits the read request to the second device interface and transmits received response data to the first device interface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.