Patent · US Active

3DIC interconnect apparatus and method

US9293392B2 · kind B2 · utility

4Cited by
2References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 6, 2013
Grant dateMar 22, 2016
Priority date
Expiry dateSep 6, 2033

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/10253
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

An interconnect apparatus and a method of forming the interconnect apparatus is provided. Two substrates, such as wafers, dies, or a wafer and a die, are bonded together. A first mask is used to form a first opening extending partially to an interconnect formed on the first wafer. A dielectric liner is formed, and then another etch process is performed using the same mask. The etch process continues to expose interconnects formed on the first substrate and the second substrate. The opening is filled with a conductive material to form a conductive plug.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.