Power device and preparation method thereof
US9293397B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 14, 2015 |
| Grant date | Mar 22, 2016 |
| Priority date | — |
| Expiry date | May 14, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/13091
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A power semiconductor package and a method of preparation are disclosed. The power semiconductor package includes a pair of first and second die paddles arranged side by side, a first semiconductor chip attached to the first die paddle, a second semiconductor chip attached to the second die paddle, a metal clip electrically connecting a first electrode at the top surface of the first semiconductor chip and a first electrode at the top surface of the second semiconductor chip to a second pin, a first conductive structure connecting a second electrode at the top surface of a first semiconductor chip to a first pin, and a second conductive structure connecting a second electrode at the top surface of the second semiconductor chip to a third pin. In examples of the present disclosure, double-chip common source technique for the source electrodes of two power MOSFETs is achieved by applying a T-shape metal clip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.