Nonvolatile memory device
US9293468B2 · kind B2 · utility
3Cited by
2References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 5, 2014 |
| Grant date | Mar 22, 2016 |
| Priority date | — |
| Expiry date | Nov 5, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6891
Abstract
A nonvolatile memory device includes a tunneling region and an erase region formed over a substrate, a selection gate formed over the substrate to overlap with the tunneling region, a floating gate formed over the substrate to be disposed adjacent to the selection gate with a gap therebetween and to overlap with the tunneling region and the erase region, and a charge blocking layer filling the gap.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.