Imaging circuitry with robust scribe line structures
US9293495B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 5, 2014 |
| Grant date | Mar 22, 2016 |
| Priority date | — |
| Expiry date | May 10, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/8063
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An image sensor wafer may be stacked on top of a digital signal processor (DSP) wafer. The image sensor wafer may include multiple image sensor dies, whereas the DSP wafer may include multiple DSP dies. The stacked wafers may be cut along scribe line regions to dice the wafers into individual components. Each image sensor die may include through-oxide vias (TOVs) that extend at least partially into a corresponding DSP die. Scribe line support structures may be formed surrounding the scribe line regions. The scribe line support structures and the TOVs may be formed during the same processing step. The TOVs can also be formed through deep trench isolation structures.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.