Memory capacity expansion using a memory riser
US9298228B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 27, 2015 |
| Grant date | Mar 29, 2016 |
| Priority date | — |
| Expiry date | Jul 27, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/185
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computing system having a memory riser sub-system. The computing system includes a motherboard with a memory module connector and a riser card inserted into the first memory module connector. A first mezzanine card is connected to the riser card. The first mezzanine card includes a first mezzanine memory module connector for a first memory module and a second mezzanine memory module connector for a second memory module. A memory channel electrically connects the memory controller to the first mezzanine memory module connector and the second mezzanine module connector via the motherboard, the first riser card and the first mezzanine card. The memory channel may be divided into a first data sub-channel connected to the first mezzanine memory module connector and a second data sub-channel connected to the second mezzanine memory module connector.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.