Static random access memory and method thereof
US9299421B1 · kind B1 · utility
11Cited by
2References
18Claims
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Inventor
Key dates
| Filing date | Oct 8, 2014 |
| Grant date | Mar 29, 2016 |
| Priority date | — |
| Expiry date | Oct 8, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/22
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A static random access memory (SRAM) includes a voltage generator coupled to receive a positive power supply voltage, and to controllably generate a first power supply voltage, which is with a reduced level and is higher than a retention voltage during a specific period. A first inverter and a second inverter each is connected between the first power supply voltage and a second power supply voltage. The first inverter and the second inverter are cross-coupled, and the output nodes of the first inverter and the second inverter act as a bit node pair.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.