Resistive memory apparatus and operation method thereof
US9299428B2 · kind B2 · utility
5Cited by
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20Claims
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Key dates
| Filing date | Jun 26, 2014 |
| Grant date | Mar 29, 2016 |
| Priority date | — |
| Expiry date | Jul 3, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C13/0007
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A resistive memory apparatus includes a memory region including a plurality of resistive memory cells, and a controller suitable for storing a threshold number of write operations according to a data storage material of the resistive memory cells, counting numbers of write operations for the respective resistive memory cells as a write operation is performed for the memory region, and performing interrupt control when a memory cell that reaches the threshold number of write operations is detected.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.