High voltage drain-extended MOSFET having extra drain-OD addition
US9299806B2 · kind B2 · utility
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1References
18Claims
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Key dates
| Filing date | May 18, 2015 |
| Grant date | Mar 29, 2016 |
| Priority date | — |
| Expiry date | May 18, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/257
Abstract
An integrated circuit and a method of forming is provided. The method includes forming a first well in a substrate, the first well having a first conductivity type, and forming a first source/drain region in the first well, the first source/drain region having a second conductivity type. A resistance protection ring is formed on the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.