Direct communication between GPU and FPGA components
US9304730B2 · kind B2 · utility
10Cited by
1References
20Claims
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Key dates
| Filing date | Aug 23, 2012 |
| Grant date | Apr 5, 2016 |
| Priority date | — |
| Expiry date | Dec 25, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2360/08
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system may include a Graphics Processing Unit (GPU) and a Field Programmable Gate Array (FPGA). The system may further include a bus interface that is external to the FPGA, and that is configured to transfer data directly between the GPU and the FPGA without storing the data in a memory of a central processing unit (CPU) as an intermediary operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.