Ray Bittner
28Patents
9h-index
18Co-inventors
72Inventor score
Filing activity: Sep 16, 1996 → Jul 10, 2020
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5828858A | Worm-hole run-time reconfigurable processor field programmable gate array (FPGA) | Physics | 190 | Expired |
| US8174508B2 | Pointing and data entry input device | Electricity | 72 | Active |
| US7539487B2 | Interfacing I/O devices with a mobile server | Electricity | 29 | Active |
| US7793040B2 | Content addressable memory architecture | Physics | 18 | Expired |
| US6434647B1 | Reflected-wave bus termination | Physics | 15 | Expired |
| US9304730B2 | Direct communication between GPU and FPGA components | Physics | 10 | Active |
| US10528321B2 | Block floating point for neural network implementations | Physics | 10 | Active |
| US7260732B1 | Power regulation system and method for a portable electronic device | Physics | 9 | Expired |
| US7856523B2 | Random Access Memory (RAM) based Content Addressable Memory (CAM) management | Physics | 9 | Active |
| US8595220B2 | Community authoring content generation and navigation | Physics | 7 | Active |
| US6526465B1 | PCI and compactpci integration | Electricity | 7 | Expired |
| US6883171B1 | Dynamic address windowing on a PCI bus | Physics | 6 | Expired |
| US9760770B2 | Parallel memories for multidimensional data access | Electricity | 5 | Active |
| US8896455B2 | Intrusion detection and communication | Electricity | 4 | Active |
| US8412882B2 | Leveraging chip variability | Physics | 4 | Active |
| US10140572B2 | Memory bandwidth management for deep learning applications | Physics | 3 | Active |
| US7707387B2 | Conditional execution via content addressable memory and parallel computing execution model | Physics | 3 | Active |
| US9978461B2 | Leveraging chip variability | Physics | 3 | Active |
| US7451297B2 | Computing system and method that determines current configuration dependent on operand input from another configuration | Physics | 2 | Active |
| US9666303B2 | Leveraging chip variability | Physics | 2 | Active |
| US8977910B2 | Leveraging chip variability | Physics | 2 | Active |
| US10748640B2 | Leveraging chip variability | Physics | 1 | Active |
| US9928567B2 | Direct communication between GPU and FPGA components | Physics | 1 | Active |
| US9262483B2 | Community authoring content generation and navigation | Physics | 1 | Active |
| US7856635B2 | Dynamic address windowing on a PCI bus | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.