Secure memory access controller
US9304944B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 29, 2012 |
| Grant date | Apr 5, 2016 |
| Priority date | — |
| Expiry date | Mar 29, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2211/007
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory access circuit and a corresponding method are provided. The memory access circuit includes a crypto block in communication with a memory that encrypts data of a data block on a block basis. The memory access circuit also includes a fault injection block configured to inject faults to the data in the data block. The memory access circuit further includes a data scrambler and an address scrambler. The data scrambler is configured to scramble data in the memory by shuffling data bits within the data block in a plurality of rounds and mash the shuffled data bits with random data. The address scrambler is configured to distribute the scrambled data across the memory. A memory system including the memory access circuit is also disclosed to implement the corresponding method.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.