Fong Pong
48Patents
17h-index
31Co-inventors
77Inventor score
Filing activity: Jul 1, 1996 → Sep 5, 2012
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7274706B1 | Methods and systems for processing network data | Electricity | 96 | Expired |
| US6119205A | Speculative cache line write backs to avoid hotspots | Physics | 84 | Expired |
| US7596144B2 | System-on-a-chip (SoC) device with integrated support for ethernet, TCP, iSCSI, RDMA, and network application acceleration | Electricity | 66 | Active |
| US6976205B1 | Method and apparatus for calculating TCP and UDP checksums while preserving CPU resources | Electricity | 59 | Expired |
| US5900011A | Integrated processor/memory device with victim data cache | Physics | 42 | Expired |
| US6199142A | Processor/memory device with integrated CPU, main memory, and full width cache and associated method | Physics | 40 | Expired |
| US6880045B2 | Multi-processor computer system with transactional memory | Emerging Cross-Sectional Technologies | 37 | Expired |
| US6073212A | Reducing bandwidth and areas needed for non-inclusive memory hierarchy by using dual tags | Physics | 36 | Expired |
| US6341337B1 | Apparatus and method for implementing a snoop bus protocol without snoop-in and snoop-out logic | Physics | 34 | Expired |
| US6128702A | Integrated processor/memory device with victim data cache | Physics | 29 | Expired |
| US6851074B2 | System and method for recovering from memory failures in computer systems | Physics | 28 | Expired |
| US6360231B1 | Transactional memory for distributed shared memory multi-processor computer systems | Emerging Cross-Sectional Technologies | 25 | Expired |
| US6874065B1 | Cache-flushing engine for distributed shared memory multi-processor computer systems | Physics | 23 | Expired |
| US6253291A | Method and apparatus for relaxing the FIFO ordering constraint for memory accesses in a multi-processor asynchronous cache system | Physics | 23 | Expired |
| US7861055B2 | Method and system for on-chip configurable data ram for fast memory and pseudo associative caches | Emerging Cross-Sectional Technologies | 20 | Expired |
| US6728843B1 | System and method for tracking and processing parallel coherent memory accesses | Physics | 20 | Expired |
| US5909697A | Reducing cache misses by snarfing writebacks in non-inclusive memory systems | Physics | 18 | Expired |
| US6745294B1 | Multi-processor computer system with lock driven cache-flushing system | Physics | 10 | Expired |
| US6490662B1 | System and method for enhancing the reliability of a computer system by combining a cache sync-flush engine with a replicated memory module | Physics | 9 | Expired |
| US6516343B1 | Computer system and method for enhancing memory-to-memory copy transactions by utilizing multiple system control units | Physics | 9 | Expired |
| US7711902B2 | Area effective cache with pseudo associative memory | Physics | 8 | Active |
| US7885268B2 | Method and system for hash table based routing via table and prefix aggregation | Electricity | 7 | Active |
| US7120752B2 | Multi-processor computer system with cache-flushing system using memory recall | Physics | 7 | Expired |
| US9304944B2 | Secure memory access controller | Physics | 6 | Active |
| US6675262B1 | Multi-processor computer system with cache-flushing system using memory recall | Physics | 6 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.