Memory transistor with multiple charge storing layers and a high work function gate electrode
US9306025B2 · kind B2 · utility
20Cited by
47References
20Claims
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Key dates
| Filing date | Jun 18, 2014 |
| Grant date | Apr 5, 2016 |
| Priority date | — |
| Expiry date | Jun 18, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/349
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes an oxide-nitride-oxide (ONO) dielectric stack on a surface of a substrate, and a high work function gate electrode formed over a surface of the ONO dielectric stack. The ONO dielectric stack includes a multi-layer charge storage layer including a silicon-rich, oxygen-lean top silicon nitride layer and an oxygen-rich bottom silicon nitride layer. The high work function gate electrode includes a P+ doped polysilicon layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.