Semiconductor device and integrated apparatus comprising the same
US9306064B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 30, 2014 |
| Grant date | Apr 5, 2016 |
| Priority date | — |
| Expiry date | Oct 30, 2034 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02B70/10
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
The present disclosure provides a semiconductor device and an integrated apparatus having the same. The semiconductor device includes a substrate, a buffer layer on the substrate, a compensation area which includes a p-region and a n-region on the buffer layer, and a transistor cell on the compensation area. The transistor cell includes a source region, a body region, a gate electrode and a gate dielectric formed at least between the gate electrode and the body region. The gate dielectric has a thickness in a range of 12 nm to 50 nm.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.