Temperature-compensated high accuracy clock
US9306543B2 · kind B2 · utility
1Cited by
14References
19Claims
0Family size
Assignee
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Key dates
| Filing date | Jan 7, 2014 |
| Grant date | Apr 5, 2016 |
| Priority date | — |
| Expiry date | Jun 15, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/808
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A tunable clock circuit has a dual overlapping digital to analog converter (DAC) and an oscillator. The dual overlapping DAC provides a first output selectable with a first resolution and a second output selectable with a second resolution. The first resolution is different from the second resolution. The oscillator has a first input coupled to the first output of the dual overlapping DAC, a second input coupled to the second output of the dual overlapping DAC, and an output providing a clock output signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.