Pseudo dual port memory using a dual port cell and a single port cell with associated valid data bits and related methods
US9311990B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 17, 2014 |
| Grant date | Apr 12, 2016 |
| Priority date | — |
| Expiry date | Dec 17, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/418
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A pseudo dual port memory includes a set of dual port memory cells having a read port and a write port, and configured to store data words in each of a plurality of addressed locations, and a set of single port memory cells having a read/write port, and configured to store data words in each of a plurality of addressed locations. A valid data storage unit is configured to store valid bits corresponding to the addressed locations of the set of dual port memory cells and the set of single port memory cells. Control circuitry is configured to access the addressed locations of the set of dual port memory cells and the set of single port memory cells. The control circuitry performs a simultaneous write operation using the write port of the set of dual port memory cells and the read/write port of the set of single port memory cells, and updates corresponding valid bits in the valid data storage unit, and performs a parallel read operation, at a same addressed location of the set of dual port memory cells and the set of single port memory cells, using the read port of the set of dual port memory cells and the read/write port of the set of single port memory cells, and determining which st…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.