Method for processing gate dielectric layer deposited on germanium-based or group III-V compound-based substrate
US9312126B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 8, 2014 |
| Grant date | Apr 12, 2016 |
| Priority date | — |
| Expiry date | Jan 8, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/691
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention discloses a method for processing a gate dielectric layer deposited on a germanium-based or Group III-V compound-based substrate, belonging to a semiconductor device field. The method comprises the steps of depositing a high-K gate dielectric layer on the germanium-based or Group III-V compound-based substrate, and then performing a plasma process to the high-K gate dielectric layer by using fluorine plasma, wherein during the plasma process, a guiding electric field is applied so that fluorine ions, when being accelerated to a surface of the gate dielectric layer, has an energy of 5-50 eV and the fluorine plasma drifts into the high-K gate dielectric layer, a ratio of a density of the fluorine ions in the high-K gate dielectric layer and a density of oxygen atoms in the high-K gate dielectric layer being 0.01-0.15:1.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.