Semiconductor device and method of manufacturing the same

US9312187B2 · kind B2 · utility

Assignee

• INSTITUTE OF MICROELECTRONICS OF THE CHINESE ACADEMY OF SCIENCES · CN

Inventors

• Huaxiang Yin · Beijing, CN
• Xiaolong Ma · Beijing, CN
• Qiuxia Xu · Beijing, CN
• Dapeng Chen · Beijing, CN

Key dates

• Filing date: Apr 11, 2012
• Grant date: Apr 12, 2016
• Expiry date: Apr 11, 2032

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/0167

Abstract

The present invention discloses a semiconductor device, comprising a first MOSFET; a second MOSFET; a first stress liner covering the first MOSFET and having a first stress; a second stress liner covering the second MOSFET and having a second stress; wherein the second stress liner and/or the first stress liner comprise(s) a metal oxide. In accordance with the high-stress CMOS and method of manufacturing the same of the present invention, a stress layer comprising a metal oxide is formed selectively on PMOS and NMOS respectively by using a CMOS compatible process, whereby carrier mobility of the channel region is effectively enhanced and the performance of the device is improved.