Semiconductor device and method for manufacturing the same
US9312357B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 16, 2014 |
| Grant date | Apr 12, 2016 |
| Priority date | — |
| Expiry date | Oct 16, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device and a method for manufacturing the same. The method includes steps hereinafter. A substrate is provided with a first dielectric layer thereon. The first dielectric layer is provided with a trench. Then, a metal layer is formed to fill the trench and to cover the surface of the first dielectric layer. The metal layer is partially removed so that a remaining portion of the metal layer covers the first dielectric layer. A treatment process is performed to transform the remaining portion of the metal layer into a passivation layer on the top portion and a gate metal layer on the bottom portion. A chemical-mechanical polishing process is performed until the first dielectric layer is exposed so that a remaining portion of the passivation layer remains in the trench.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.