High voltage protection circuit for non-tolerant integrated circuit
US9312686B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 29, 2011 |
| Grant date | Apr 12, 2016 |
| Priority date | — |
| Expiry date | Jan 7, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02H9/041
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A high voltage protection circuit for a non-tolerant integrated circuit is described herein. A non-tolerant integrated circuit may be a powered down integrated circuit or a low voltage tolerant integrated circuit, that may be exposed to a high voltage source such as an external circuit, device or power supply. The high voltage protection circuit includes a limiting transistor circuit, a control transistor circuit, and an isolation transistor circuit. The limiting transistor circuit limits or holds the voltage at the signal bump to be less than a voltage that can damage the circuit. The isolation transistor circuit disconnects input/output signal circuitry from normal protection circuitry. Both the limiting transistor circuit and the isolation transistor circuit are controlled by the control transistor circuit and are responsive to the power supply voltage being off.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.