Partial page memory operations
US9318199B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 26, 2012 |
| Grant date | Apr 19, 2016 |
| Priority date | — |
| Expiry date | Aug 31, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7201
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Apparatuses may include a memory block with strings of memory cells formed in a plurality of tiers. The apparatus may further comprise access lines and data lines shared by the strings, with the access lines coupled to the memory cells corresponding to a respective tier of the plurality of tiers. The memory cells corresponding to at least a portion of the respective tier may comprise a respective page of a plurality of pages. Subsets of the data lines may be mapped into a respective partial page of a plurality of partial pages of the respective page. Each partial page may be independently selectable from other partial pages. Additional apparatuses and methods are disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.