Nonvolatile semiconductor memory device and method of operating the same
US9318207B2 · kind B2 · utility
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4References
11Claims
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Key dates
| Filing date | Dec 15, 2014 |
| Grant date | Apr 19, 2016 |
| Priority date | — |
| Expiry date | Dec 15, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/0408
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A nonvolatile semiconductor memory device according to an embodiment comprises a control unit, during a data erase, applying at least to a word line connected to a memory cell disposed most to a source line side a lower control voltage than that applied to a word line connected to a memory cell disposed most to a bit line side, of a plurality of word lines connected to at least a plurality of memory cells mutually written with data of an identical number of bits in a cell string.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.