Test circuit and method of semiconductor integrated circuit
US9322868B2 · kind B2 · utility
1Cited by
2References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 30, 2014 |
| Grant date | Apr 26, 2016 |
| Priority date | — |
| Expiry date | Dec 30, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/00014
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A test circuit of a semiconductor integrated circuit includes a through via, a voltage driving unit, and a determination unit. The through via is charged by receiving an input voltage. The voltage driving unit generates a test voltage by charging or discharging the through via in response to a test control signal. The determination unit compares levels of the input voltage and the test voltage and outputs a resultant signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.