Memory arrangement for implementation of high-throughput key-value stores
US9323457B2 · kind B2 · utility
11Cited by
3References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 9, 2013 |
| Grant date | Apr 26, 2016 |
| Priority date | — |
| Expiry date | May 15, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F16/24569
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A circuit for processing data is described. The circuit comprises an input for receiving a request for implementing a key-value store data transaction; a plurality of memory interfaces associated with different memory types enabling access to a plurality of memory devices associated with a key-value store; and a memory management circuit controlling the routing of data by way of the plurality of memory interfaces based upon a data transfer criterion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.