Multiple page size memory management unit
US9323691B2 · kind B2 · utility
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8References
12Claims
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Key dates
| Filing date | Mar 8, 2012 |
| Grant date | Apr 26, 2016 |
| Priority date | — |
| Expiry date | Oct 12, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/652
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory management unit can receive an address associated with a page size that is unknown to the MMU. The MMU can concurrently determine whether a translation lookaside buffer data array stores a physical address associated with the address based on different portions of the address, where each of the different portions is associated with a different possible page size. This provides for efficient translation lookaside buffer data array access when different programs, employing different page sizes, are concurrently executed at a data processing device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.