Process for fabricating a circuit substrate
US9324580B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 2, 2015 |
| Grant date | Apr 26, 2016 |
| Priority date | — |
| Expiry date | Jul 2, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/1461
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process for fabricating a circuit substrate is provided. The process includes the following steps. A carrier is provided. A conductive layer and a dielectric layer are placed on the carrier, and the conductive layer is located between the carrier and the dielectric layer. The dielectric layer is patterned to form a patterned-dielectric layer having first openings partially exposing the conductive layer. Arc-shaped grooves are formed on the exposed part of the conductive layer. A first-patterned-photoresist layer having second openings respectively connecting the first openings is formed. Conductive structures are formed, wherein each of the conductive structures is integrally formed and includes a pad part, a connection part, and a protruding part; the second openings, the first openings and the arc-shaped grooves are respectively filled with the pad parts, the connection parts and the protruding parts. The first patterned photoresist layer, the carrier and the conductive layer are removed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.