Semiconductor device having a tapered gate structure and method
US9324823B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 15, 2014 |
| Grant date | Apr 26, 2016 |
| Priority date | — |
| Expiry date | Aug 15, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a semiconductor body having a first surface vertically spaced apart from a second surface. A first trench vertically extends into the semiconductor body from the first surface and includes first and second sidewalls extending across the semiconductor body in a lateral direction that is parallel to the first surface. A field electrode is arranged in first trench and electrically insulated from the semiconductor body by a field dielectric. A first gate electrode is arranged in the first trench. The first gate electrode is electrically insulated from the field electrode by the field dielectric and is electrically insulated from the semiconductor body by a first gate oxide. The first gate electrode includes widened and tapered portions that are continuously connected and adjacent to one another in the lateral direction. The first gate oxide forms a non-perpendicular angle with the first sidewall in the lateral direction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.