LDMOS transistor having elevated field oxide bumps and method of making same
US9330979B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 29, 2008 |
| Grant date | May 3, 2016 |
| Priority date | — |
| Expiry date | Dec 17, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/111
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A low Rdson LDMOS transistor having a shallow field oxide region that separates a gate electrode of the transistor from a drain diffusion region of the transistor. The shallow field oxide region is formed separate from the field isolation regions (e.g., STI regions) used to isolate circuit elements on the substrate. Fabrication of the shallow field oxide region is controlled such that this region extends below the upper surface of the semiconductor substrate to a depth that is much shallower than the depth of field isolation regions. For example, the shallow field oxide region may extend below the upper surface of the substrate by only Angstroms or less. As a result, the current path through the resulting LDMOS transistor is substantially unimpeded by the shallow field oxide region, resulting in a low on-resistance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.