Semiconductor device and manufacturing method thereof
US9331074B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 30, 2015 |
| Grant date | May 3, 2016 |
| Priority date | — |
| Expiry date | Jan 30, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0135
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes first and second Fin FET transistors and a separation plug made of an insulating material and disposed between the first and second Fin FET transistors. The first Fin FET transistor includes a first fin structure extending in a first direction, a first gate dielectric formed over the first fin structure and a first gate electrode formed over the first gate dielectric and extending a second direction perpendicular to the first direction. The second Fin FET transistor includes a second fin structure, a second gate dielectric formed over the second fin structure and a second gate electrode formed over the first gate dielectric and extending the second direction. In a cross section along the second direction and across the first gate electrode, the second gate electrode and the separation plug, the separation plug has a tapered shape having a top size smaller than a bottom size.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.