Input buffer apparatuses and methods
US9331646B2 · kind B2 · utility
1Cited by
8References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 5, 2015 |
| Grant date | May 3, 2016 |
| Priority date | — |
| Expiry date | Jan 5, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45051
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Apparatuses and methods are disclosed, including an apparatus with a first differential amplifier to amplify an input signal into a first output signal, a second differential amplifier to amplify the input signal into a second output signal that is complementary to the first output signal, and a feedback resistance coupled between the first output signal and the second output signal. Additional apparatuses and methods are described.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.