Semiconductor apparatus
US9336903B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 3, 2013 |
| Grant date | May 10, 2016 |
| Priority date | — |
| Expiry date | Aug 1, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/48
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor apparatus includes an input buffer configured to buffer data inputted through a data input/output pad; a data input control unit configured to transfer an output of the input buffer to a data input/output line in response to a write clock; a test loop control unit configured to output one of a signal of the data input/output line and test latch data in response to a test mode signal; a data output control unit configured to output an output of the test loop control unit in response to a read clock; an output inversion select unit configured to output an output signal of the data output control unit by inverting or non-inverting it; and an output buffer configured to buffer an output signal of the output inversion select unit and output a resultant signal to a node which is coupled with the data input/output pad and input buffer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.