Semiconductor devices including supporting patterns in gap regions between conductive patterns
US9337150B2 · kind B2 · utility
3Cited by
8References
27Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 30, 2013 |
| Grant date | May 10, 2016 |
| Priority date | — |
| Expiry date | Aug 30, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit device includes spaced apart conductive patterns on a substrate surface, and a supporting pattern on the substrate surface between adjacent ones of the conductive patterns and separated therefrom by respective gap regions. The adjacent ones of the conductive patterns extend away from the substrate surface beyond a surface of the supporting pattern therebetween. A capping layer is provided on respective surfaces of the conductive patterns and the surface of the supporting pattern. Related fabrication methods are also discussed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.