Semiconductor device and method for manufacturing same
US9337213B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 29, 2013 |
| Grant date | May 10, 2016 |
| Priority date | — |
| Expiry date | Mar 29, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02565
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
This semiconductor device (100) includes: a gate electrode (3); a gate insulating layer (4); an oxide layer (50) which is formed on the gate insulating layer (4) and which includes a first conductor region (55) and a first semiconductor region (51) that overlaps at least partially with the gate electrode (3) with the gate insulating layer (4) interposed between them; a source electrode (6s) formed to contact with the upper surface of the first semiconductor region (51) of the oxide layer (50); a drain electrode (6d) which is formed to contact with the upper surface of the first semiconductor region (51) of the oxide layer (50) and which is electrically connected to the first conductor region (55); and a conductive layer (60) which is formed in contact with the upper surface of the oxide layer (50) and which a plurality of holes (66) or notches. The oxide layer (50) has a plurality of second conductor regions (57, 58), and each of which has a surface exposed inside respective one of the holes or notches of the conductive layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.