Semiconductor device having Ti- and N-containing layer, and manufacturing method of same
US9343402B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 22, 2015 |
| Grant date | May 17, 2016 |
| Priority date | — |
| Expiry date | Jul 22, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A manufacturing method of a semiconductor device comprises releasing an oxidation source included in an interlayer dielectric film having an opening portion formed on a surface thereof and being present on the surface of the interlayer dielectric film at a first substrate temperature, forming a first layer containing Ti and N to contact with at least a part of the interlayer dielectric film at a second substrate temperature lower than the first substrate temperature, wherein a Ti content in the first layer is more than 50 at % in all components, provided that oxygen and precious metals are excluded from the all components, and forming a Cu metal layer above the first layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.