Wafer scale packaging platform for transceivers

US9343450B2 · kind B2 · utility

Assignee

• Cisco Technology, Inc. · US

Inventors

• Kalpendu Shastri · Orefield, US
• Vipulkumar Patel · Emmaus, US
• Mark A. Webster · Bethlehem, US
• Prakash Gothoskar · Allentown, US
• Ravinder Kachru · Los Altos Hills, US
• Soham Pathak · Allentown, US
• Rao Yelamarty · Allentown, US
• Thomas Daugherty · Allentown, US
• Bipin Dama · Bound Brook, US
• Kaushik Patel · San Jose, US
• Kishor Desai · Fremont, US

Key dates

• Filing date: May 13, 2014
• Grant date: May 17, 2016
• Expiry date: Jul 8, 2034

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2224/48227
• WIPO field: Optics
• WIPO sector: Instruments

Abstract

A wafer scale implementation of an opto-electronic transceiver assembly process utilizes a silicon wafer as an optical reference plane and platform upon which all necessary optical and electronic components are simultaneously assembled for a plurality of separate transceiver modules. In particular, a silicon wafer is utilized as a “platform” (interposer) upon which all of the components for a multiple number of transceiver modules are mounted or integrated, with the top surface of the silicon interposer used as a reference plane for defining the optical signal path between separate optical components. Indeed, by using a single silicon wafer as the platform for a large number of separate transceiver modules, one is able to use a wafer scale assembly process, as well as optical alignment and testing of these modules.