Circuit for and method of realigning data at a receiver
US9348750B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 14, 2006 |
| Grant date | May 24, 2016 |
| Priority date | — |
| Expiry date | Apr 10, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/387
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A circuit for realigning data received at a receiver is disclosed. The circuit comprises a plurality of memory arrays; a plurality of multiplexers, wherein each multiplexer is coupled to select an address for data to be output by a memory array of the plurality of memory arrays; an output multiplexer coupled to select the outputs of the plurality of memory arrays; and a memory control circuit coupled to the plurality of multiplexers and the output multiplexer, the memory control circuit coupling select signals to the plurality of multiplexers and the output multiplexer to enable generating realigned data. A method of realigning data received at a receiver is also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.