Semiconductor arrangement and formation thereof
US9349634B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 21, 2014 |
| Grant date | May 24, 2016 |
| Priority date | — |
| Expiry date | Feb 21, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor arrangement and method of formation are provided. The semiconductor arrangement includes a metal connect over and connected to a first active region, over and connected to a second active region and over a shallow trench isolation (STI) region thereby connecting the first active region to the second active region. A metal contact is over and connected to a gate in the STI region. The metal connect is formed in a first opening and the metal contact is formed in a second opening, where the first opening and the second opening are formed concurrently using a single mask. The semiconductor arrangement formed using a single mask is less expensive to fabricate and requires fewer etching operations than a semiconductor arrangement formed using multiple masks.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.